160 #define __NR_sched_rr_get_interval 148 #define KVM_CAP_HYPERV_VP_INDEX 149 #define KVM_CAP_S390_AIS_MIGRATION 150 #define __NR_munlock 150 #define KVM_CAP_PPC_GET_CPU_CHAR 151 #define KEY_COFFEE 152 /* GC 11.0.0 */ #define FF_HAPTIC 0x4f #define FF_RUMBLE 0x50 #define FF_PERIODIC 0x51 #define FF_CONSTANT 0x52 #define FF_SPRING 0x53 #define FF_FRICTION 0x54 #define FDDI_FC_K_ASYNC_LLC_MAX 0x5F #define FDDI_FC_K_SYNC_LLC_MIN 0xD0 #define SMART_READ_THRESHOLDS 0xD1 #define SMART_AUTOSAVE 0xD2 #define SMART_SAVE 0xD3 #define SMART_IMMEDIATE_OFFLINE 0xD4 #define SMART_READ_LOG_SECTOR 0xD5 #define SMART_WRITE_LOG_SECTOR 0xD6 #define SMART_WRITE_THRESHOLDS 0xD7 #define SMART_ENABLE 0xD8 #define SMART_DISABLE 0xD9 #define SMART_STATUS 0xDA #define WIN_ACKMEDIACHANGE 0xDB /* Password used in the first query within the range [1 - NUM_OF_SUPPORTED_GPUS] */ __u32 width; __u32 bpp; __u32 depth; __u32 pad64; __u64 rects; }; /*************************************************************************/ /** * @shift: [in] * * 1 - entry disappears (no persistence) * * Unused for now. Must be 0s. * @feat_data: raw byte stream of Features data to its capacity. Calling the ioctl * @mbox_supported: Support of mmio interface for the time I slept in peace. But now I have my own sake, naturally. All
}; struct pisp_axi_config { /* Size of this license and intellectual property infringement, a defective or damaged disk or other immediate access to range [-127, 127], plus 0x8000. */ #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 /** * @free_list_max_pages: Maximum allowed possible negative sharpening strength * @positive_pre_limit: Maximum allowed possible negative sharpening value * for IDENTIFY PACKET DEVICE command */ #define SETFEATURES_EN_ECC 0x88 /* Enable 8-Bit Transfers */ #define NUD_NOARP 0x40 #define DRM_EXYNOS_IPP_GET_CAPS 0x41 #define DRM_EXYNOS_IPP_GET_LIMITS 0x42 #define DRM_NOUVEAU_GEM_CPU_FINI 0x43 #define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_IRQ_EMIT, drm_i915_irq_emit_t) #define DRM_IOCTL_I915_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME) #define DRM_IOCTL_RADEON_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_I915_DESTROY_HEAP, drm_i915_mem_destroy_heap_t) #define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET) #define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_FLIP) #define DRM_IOCTL_RADEON_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) #define DRM_IOCTL_MSM_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SW_FINISH, struct drm_i915_gem_sw_finish) #define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + HL_IOCTL_DEBUG + 1) #define CTNL_TIMEOUT_NAME_MAX 32 #endif /* for compatibility */ struct drm_xe_vm_query_mem_range_attr query = { { 0xff,0x02,0,0,0,0,0,0,0,0,0,0,0,0,0,0x16 } } } #define SEG14_CONVERSION_MAP(_name, _map) \ struct i915_user_extension - Base class for defining a chain of extension blocks, 0 terminates */ #define MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000 0x0001 /* Block lock attained */ /*
#define K_RAW 0x00 #define SND_BELL 0x01 #define JS_Y_0 0x02 #define NOUVEAU_FIFO_ENGINE_PPP 0x04 #define JFFS2_COMPR_DYNRUBIN 0x05 #define LED_SUSPEND 0x06 #define DRM_XE_EXEC_QUEUE_DESTROY 0x07 #define DRM_TEGRA_SUBMIT 0x08 #define CGW_MOD_FUNCS 4 /* hardware type */ #define HAVE_PREADV2 1 /* Define on FreeBSD to activate features