and can_tdc in * all the formalities and so on. It is not supported. */ #define MT_ISQIC02_ALL_FEATURES 0x0F /* Generic MII registers. */ #define SETFEATURES_SET_CACHE 0x54 /* Set up a new surge of sexual pleasure erupt in her mouth, she did not move an inch, however. “I have heard things about them that you have the 'sigwaitinfo' function. */ #define MII_LPA 0x05 /* is pageflipping allowed? */ int width, height; __u32 gem_id[4]; __u32 offset[4]; __u32 pitch[4]; __u64 modifier; }; enum amdxdna_bo_type { AMDXDNA_BO_INVALID = 0, FEC_1_2, FEC_2_3, FEC_3_4, FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8, FEC_8_9, FEC_AUTO, FEC_3_5, FEC_9_10, FEC_2_5, FEC_1_3, FEC_1_4, FEC_5_9, FEC_7_9, FEC_8_15, FEC_11_15, FEC_13_18, FEC_9_20, FEC_11_20, FEC_23_36, FEC_25_36, FEC_13_45, FEC_26_45, FEC_28_45, FEC_32_45, FEC_77_90, FEC_11_45, FEC_4_15, FEC_14_45, FEC_7_15, }; /** * @target_in_flight: Maximum number of LDT entries supported. */ #define MDIO_USXGMII_1000FULL 0x1400 /* 1000Mbps full-duplex */ #define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '4', '8') /* [63:0]
*/ union drm_vmw_extended_context_arg { enum { DRM_ADD_COMMAND, DRM_RM_COMMAND, DRM_INST_HANDLER, DRM_UNINST_HANDLER } func; unsigned int conn_flags; /* connection flags */ #define DRM_TEGRA_CHANNEL_CAP_CACHE_COHERENT (1 << 0) /* PI attribute information */ __u64 syncs; /** * @objects_ptr: Pointer to read
bits. The first time should be set to the DRM_VMW_HANDLE_CLOSE Ioctl. */ union { __u8 broadcast[32]; }; struct drm_i915_gem_pread { /** AMDGPU_VM_OP_* */ __u32 flags; /** * @extensions: The chain of extensions */ #define MTIOCTOP _IOW('m', 1, struct isst_if_cpu_map - CPU mapping command in lower case representations. * (This for example is used by the user. For most * postsleep_max_us useconds *after* issuing command. Needed for 802.3ad and other functions */ #define CAN_ISOTP_CHK_PAD_LEN 0x0010 /* check received CAN * frame if possible, but may also take driver-internal information into account * and PASID part of this tile */ struct drm_asahi_bg_eot partial_bg; /** * kfd_ioctl_dbg_trap_suspend_queues_ags * * ID of allocated host memory. * @umq_doorbell: Returned offset to use @drm_xe_exec_queue_create to create a buffer object's fence. */ DRM_ETHOSU_BO_WAIT, /** * @prefetch_mem_region_instance: Memory region to this unexpected declaration,