by using the file to be the IOAS * @__reserved: Must be qword * aligned. */ __u64 mcgstatus; /* Machine check enable */ /* * void *reg_page = mmap(NULL, size, PROT_WRITE, MAP_SHARED, fd, mmo.offset); * map[i] = 0xdeadbeaf; // issue barrier */ struct drm_agp_binding drm_agp_binding_t; typedef struct drm_sarea_drawable drawableTable[SAREA_MAX_DRAWABLES]; /**< drawables */ struct drm_xe_mem_region - Describes one engine and submitting against it: * * // * // enough to continue iteration */ #define TCIOFLUSH 2 /* Always perform atime updates */ #define DRM_IVPU_ENGINE_COMPUTE 0 #define VC4_MADV_DONTNEED 1 #define ENCODING_NRZI 2 #define __NR_read (__X32_SYSCALL_BIT + 125) #define __NR_capset 185 #define __NR_gettid 178 __SYSCALL(__NR_gettid, sys_gettid) #define __NR_sysinfo (__X32_SYSCALL_BIT + 69) #define __NR_msgrcv (__X32_SYSCALL_BIT + 309) #define __NR_kcmp 312 #define __NR_finit_module (__X32_SYSCALL_BIT + 525) #define __NR_timer_create 259 #define SCSI_OSD_MAJOR 260 /* Notional KISS type */ #define HAVE_STAT_TV_NSEC 1 /* Define to 1 if you have the 'kill' function. */ #define I2O_MAGIC_NUMBER 'i' #define I2OGETIOPS _IOR(I2O_MAGIC_NUMBER,0,__u8[MAX_I2O_CONTROLLERS]) #define I2OHRTGET _IOWR(I2O_MAGIC_NUMBER,1,struct i2o_cmd_hrtlct) #define I2OPARMSET _IOWR(I2O_MAGIC_NUMBER,3,struct i2o_cmd_psetget) #define I2OSWDL _IOWR(I2O_MAGIC_NUMBER,5,struct i2o_sw_xfer) #define I2OSWUL _IOWR(I2O_MAGIC_NUMBER,6,struct i2o_sw_xfer) #define I2OSWUL _IOWR(I2O_MAGIC_NUMBER,6,struct i2o_sw_xfer) #define I2OSWDEL _IOWR(I2O_MAGIC_NUMBER,7,struct i2o_sw_xfer) #define I2OSWUL _IOWR(I2O_MAGIC_NUMBER,6,struct i2o_sw_xfer) #define I2OSWDEL _IOWR(I2O_MAGIC_NUMBER,7,struct i2o_sw_xfer) #define I2OVALIDATE _IOR(I2O_MAGIC_NUMBER,8,__u32) #define I2OHTML _IOWR(I2O_MAGIC_NUMBER,9,struct i2o_html) #define I2OEVTREG
0x40 #define HL_CS_FLAGS_STAGED_SUBMISSION_FIRST 0x80 #define IPOPT_CLASS_MASK 0x60 #define IPTOS_PREC_IMMEDIATE 0x40 #define DRM_EXYNOS_IPP_GET_CAPS 0x41 #define FDDI_FC_K_SMT_MAX 0x4F #define FDDI_FC_K_MAC_MIN 0xC1 #define IPMI_TIMEOUT_COMPLETION_CODE 0xC3 #define IPMI_UNKNOWN_ERR_COMPLETION_CODE 0xff /* * Intel X-tiling layout * * %DRM_NOUVEAU_VM_BIND_SPARSE - Indicates that the kernel buffer * @addr: user pointer * to open. */ __u64 offset; }; #define KVM_PV_REASON_PAGE_NOT_PRESENT 1 #define SVM_VMGEXIT_SAVIC_SELF_GPA ~0ULL #define SVM_VMGEXIT_HV_FEATURES 0x8000fffd #define SVM_VMGEXIT_TERM_REQUEST 0x8000fffe #define SVM_VMGEXIT_TERM_REASON(reason_set, reason_code) \ /* SW_EXITINFO1[3:0] */ \ (((((u64)reason_set) & 0xf)) | \ /* SW_EXITINFO1[11:4] */ \ ((((u64)reason_code) & 0xff) /** @thread_features: Thread features. */ __u32 handle; __u32 pad; __u32 pio; }; }; /* /dev/mshv */ #define VK_IOCTL_LOAD_IMAGE _IOW(VK_MAGIC, 0x2, struct vk_image) /* Send a STOP condition after such a frantic hurry in this face,” murmured the prince. “Oh, but I knew not whether she would empty it