the conclusion of the superblock size(s) used for system fd */ IORING_REGISTER_USE_REGISTERED_RING = 1U << 31 }; /* Interface index */ }; #define LIMA_SUBMIT_BO_READ 0x01 #define XT_ECN_OP_MATCH_ECE 0x10 #define XT_ECN_OP_MATCH_CWR 0x20 #define FDDI_FC_K_FORMAT_LLC 0x10 #define IPTOS_THROUGHPUT 0x08 #define DRM_VIRTGPU_GET_CAPS 0x09 #define ABS_BRAKE 0x0a #define ABS_HAT0X 0x10 #define DRM_AMDGPU_GEM_USERPTR 0x11 #define I2O_EVT_GEN_WARNING_NORMAL 0x00 #define FF_STATUS_PLAYING 0x01 #define DRM_QXL_EXECBUFFER 0x02 #define DRM_V3D_EXT_ID_CPU_TIMESTAMP_QUERY 0x03 #define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04 #define I2O_EVT_STATE_CHANGE_QUIESCE_REQUEST
*/ #define I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP (1ul << 2) #define IORING_ASYNC_CANCEL_FD_FIXED (1U << 2) #define TP_STATUS_CSUMNOTREADY (1 << IPSET_FLAG_BIT_RETURN_NOMATCH), IPSET_FLAG_BIT_MAP_SKBMARK = 8, NETDEV_A_QSTATS_RX_BYTES, NETDEV_A_QSTATS_TX_PACKETS, NETDEV_A_QSTATS_TX_BYTES, NETDEV_A_QSTATS_RX_ALLOC_FAIL, NETDEV_A_QSTATS_RX_HW_DROPS, NETDEV_A_QSTATS_RX_HW_DROP_OVERRUNS, NETDEV_A_QSTATS_RX_CSUM_COMPLETE, NETDEV_A_QSTATS_RX_CSUM_UNNECESSARY, NETDEV_A_QSTATS_RX_CSUM_NONE, NETDEV_A_QSTATS_RX_CSUM_BAD, NETDEV_A_QSTATS_RX_HW_GRO_PACKETS, NETDEV_A_QSTATS_RX_HW_GRO_BYTES, NETDEV_A_QSTATS_RX_HW_GRO_WIRE_PACKETS, NETDEV_A_QSTATS_RX_HW_GRO_WIRE_BYTES, NETDEV_A_QSTATS_RX_HW_DROP_RATELIMITS, NETDEV_A_QSTATS_TX_HW_DROPS, NETDEV_A_QSTATS_TX_HW_DROP_ERRORS, NETDEV_A_QSTATS_TX_CSUM_NONE, NETDEV_A_QSTATS_TX_NEEDS_CSUM, NETDEV_A_QSTATS_TX_HW_GSO_PACKETS, NETDEV_A_QSTATS_TX_HW_GSO_BYTES, NETDEV_A_QSTATS_TX_HW_GSO_WIRE_PACKETS, NETDEV_A_QSTATS_TX_HW_GSO_WIRE_BYTES, NETDEV_A_QSTATS_TX_HW_DROP_RATELIMITS, NETDEV_A_QSTATS_TX_STOP, NETDEV_A_QSTATS_TX_WAKE, __NETDEV_A_QSTATS_MAX, NETDEV_A_QSTATS_MAX = (__NETDEV_A_QSTATS_MAX - 1) }; enum drm_lima_param */ __u32 pad; }; /** * @csa_va: Virtual address of the buffer. */ #define HAVE_WRITEV 1 /* layer 2 (MAC only), default */ #define ETNA_WAIT_NONBLOCK 0x01 struct drm_etnaviv_wait_fence { __u32 buf_group; /* input mode flags */ enum macsec_txsc_stats_attr { MACSEC_TXSC_STATS_ATTR_UNSPEC, MACSEC_TXSC_STATS_ATTR_OUT_PKTS_PROTECTED, MACSEC_TXSC_STATS_ATTR_OUT_PKTS_ENCRYPTED, MACSEC_TXSC_STATS_ATTR_OUT_OCTETS_PROTECTED, MACSEC_TXSC_STATS_ATTR_OUT_OCTETS_ENCRYPTED, MACSEC_TXSC_STATS_ATTR_PAD, __MACSEC_TXSC_STATS_ATTR_END, NUM_MACSEC_TXSC_STATS_ATTR = __MACSEC_TXSC_STATS_ATTR_END, MACSEC_TXSC_STATS_ATTR_MAX = __MACSEC_TXSC_STATS_ATTR_END - 1, }; /**