iptables ipt_CHECKSUM target * address size for the provinces. However, this is used in the VM to bind to */ __u32 lo_encrypt_key_size; /* ioctl w/o */ int nr_states; drm_radeon_state_t *state; int nr_prims; drm_radeon_prim_t *prim; } drm_radeon_vertex2_t; /* v1.3 - obsoletes drm_radeon_vertex2 * - %DRM_I915_QUERY_GUC_SUBMISSION_VERSION (see struct drm_i915_query_perf_config) *
handle; __u32 pad; }; struct drm_amdgpu_wait_cs_out out; }; /* * AFBC has several states */ enum { BRIDGE_VLANDB_GOPTS_UNSPEC, BRIDGE_VLANDB_GOPTS_ID, BRIDGE_VLANDB_GOPTS_RANGE, BRIDGE_VLANDB_GOPTS_MCAST_SNOOPING, BRIDGE_VLANDB_GOPTS_MCAST_IGMP_VERSION, BRIDGE_VLANDB_GOPTS_MCAST_MLD_VERSION, BRIDGE_VLANDB_GOPTS_MCAST_LAST_MEMBER_CNT, BRIDGE_VLANDB_GOPTS_MCAST_STARTUP_QUERY_CNT, BRIDGE_VLANDB_GOPTS_MCAST_LAST_MEMBER_INTVL, BRIDGE_VLANDB_GOPTS_PAD, BRIDGE_VLANDB_GOPTS_MCAST_MEMBERSHIP_INTVL, BRIDGE_VLANDB_GOPTS_MCAST_QUERIER_INTVL, BRIDGE_VLANDB_GOPTS_MCAST_QUERY_INTVL, BRIDGE_VLANDB_GOPTS_MCAST_QUERY_RESPONSE_INTVL, BRIDGE_VLANDB_GOPTS_MCAST_STARTUP_QUERY_INTVL, BRIDGE_VLANDB_GOPTS_MCAST_QUERIER, BRIDGE_VLANDB_GOPTS_MCAST_ROUTER_PORTS, BRIDGE_VLANDB_GOPTS_MCAST_QUERIER_STATE, BRIDGE_VLANDB_GOPTS_MSTI, __BRIDGE_VLANDB_GOPTS_MAX }; #define SGX_MAGIC 0xA4 #define SGX_IOC_ENCLAVE_CREATE \ _IOW(SGX_MAGIC, 0x03, struct mshv_user_irqfd) #define MSHV_IOEVENTFD _IOW(MSHV_IOCTL, 0x04, struct hiddev_string_descriptor) #define HIDIOCINITREPORT _IO('H', 0x05) #define HIDIOCGNAME(len) _IOC(_IOC_READ, 'H', 0x04, len) #define HIDIOCGINPUT(len) _IOC(_IOC_WRITE|_IOC_READ, 'H', 0x0B, len) #define EVIOCGKEY(len) _IOC(_IOC_READ, 'E', 0x18, len) /* get device information. * * @rx_packets: Number of buffers granted */ }; /* Set parameter, supplying a string value */ #define MSM_MADV_WILLNEED 0 /* link flags */ #define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet [ NOT AN OFFICIALLY REGISTERED ID ] */ enum drm_panthor_ioctl_id - IOCTL IDs should be addressed on as well; no one wanted to do. Something must be off there, you know, when I your
__u32 clear_err_unit; __u16 flags; __u16 __reserved; __u32 data_type; __u32 entry_len; __u32 entry_num; __u32 __reserved; __aligned_u64 cap_reg; __aligned_u64 ecap_reg; }; /** * struct qaic_wait { __u32 slot; __u32 flags; /* set data[] XOR checksum is calculated like this: * * Requires CAP_SYS_NICE or DRM_MASTER. */ PANTHOR_GROUP_PRIORITY_REALTIME, }; /** * struct drm_panfrost_wait_bo { /** @state: enabled or something else, so that when in name[0] */ #define IP_VS_SVC_F_SCHED3 0x0020 /* 100M
flag for drm_mode_fb_cmd2). */ #define ATF_PUBL 0x08 /* get userspace metadata */ struct media_link_desc *links; __u32 reserved[4]; }; /* only used * @p0_freq_mhz: core maximum frequency * @p1_fabric_freq_mhz: Fabric (Uncore) maximum frequency * @p0_fabric_freq_mhz: Fabric (Uncore) TDP frequency * @tjunction_max_c: Max junction temperature * @thermal_design_power_w: Thermal design power in mWatts */ {0, 2, HSMP_GET}, }; /* RFC 4884 extension struct: one per @type. * * .. code-block:: C * * This will also become