\ { SVM_EXIT_TR_READ, "read_rt" }, \ { EXIT_REASON_EXTERNAL_INTERRUPT, "EXTERNAL_INTERRUPT" }, \ { SVM_EXIT_READ_DR6, "read_dr6" }, \ { SVM_EXIT_INTR, "interrupt" }, \ { EXIT_REASON_TRIPLE_FAULT, "TRIPLE_FAULT" }, \ { EXIT_REASON_RDPMC, "RDPMC" }, \ { SVM_EXIT_VMMCALL, "hypercall" }, \ { SVM_EXIT_INVLPGA, "invlpga" }, \ { EXIT_REASON_MSR_READ_IMM, "MSR_READ_IMM" }, \ { SVM_EXIT_INIT, "init" }, \ { SVM_EXIT_RDTSCP, "rdtscp" }, \ { EXIT_REASON_VMOFF, "VMOFF" }, \ { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, \ { EXIT_REASON_MSR_WRITE_IMM, "MSR_WRITE_IMM" } #define VMX_ABORT_SAVE_GUEST_MSR_FAIL 1 #define FLOPPY_MAJOR 2 #define KFD_MEM_ERR_GPU_HANG 3 struct kfd_ioctl_create_event_args { __u64 flags; }; struct drm_amdgpu_gem_create_out { /** @DRM_XE_OBSERVATION_OP_STREAM_OPEN: Open an observation stream */ DRM_XE_OBSERVATION_IOCTL_ENABLE = _IO('i', 0x4), };
16,23 | LS2 | * | 1025 | 0,1 | 16,23 | LS2 | * | Header | Pad | Payload | Pad | Payload | Pad | Payload | Pad | * r | | |