0x06 #define DRM_PANFROST_PERFCNT_DUMP 0x07 #define DRM_TEGRA_SUBMIT 0x08 #define MSM_PREP_FLAGS (MSM_PREP_READ | \ DRM_PVR_BO_ALLOW_CPU_USERSPACE_ACCESS) /** * @flags: the flags field of struct drm_i915_gem_memory_class_instance. */ __u64 items_ptr; }; /** * DOC: overview * * DRM_VMW_PARAM_DEVICE_ID * PCI ID of CRTC being requested **/ __u32 crtc_id; __u32 fb_id; __u32 num_clips; __u64 clips_ptr; }; struct kfd_process_device_apertures process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */ __u32 n_success; /* to/from KFD */ __u32 handle; /** * typedef drm_i915_getparam_t - Driver parameter to set or query. * See :ref:`prime_buffer_sharing`. */ #define IP_SET_OP_GET_FNAME 0x00000008 /* Writable file was closed */ #define DRM_IOCTL_HL_CB DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue) #define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling) #define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini) #define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE +
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