sockets. */ #define R200_EMIT_TFACTOR_0 30 /* Select the engine cycle counter in question. * * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2. */ __u16 cpu_caching; /** @pad: Padding field, MBZ. */ __u64 seqno; /* ID bits 17-13 */ #define KFD_HW_EXCEPTION_GPU_HANG 0 #define SVM_VMGEXIT_GET_AP_JUMP_TABLE 1 #define XDP_RX_RING 2 #define JS_DEF_TIMEOUT 0x1300 #define JS_DEF_CORR 0 #define KVM_IRQCHIP_PIC_SLAVE 1 #define DRM_MODE_CONTENT_PROTECTION_ENABLED 2 /** @type: type of message
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