*/ #define IPMICTL_UNREGISTER_FOR_CMD_CHANS _IOR(IPMI_IOC_MAGIC, 29, \ struct drm_virtgpu_resource_info) #define DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST \ DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create) #define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init) #define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_DESTROY, struct drm_ivpu_cmdq_destroy) #define DRM_IOCTL_IVPU_CMDQ_SUBMIT \ DRM_IOW(DRM_COMMAND_BASE + DRM_QAIC_PARTIAL_EXECUTE_BO, struct qaic_execute) #define DRM_IOCTL_QAIC_WAIT_BO DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd) #define DRM_IOCTL_V3D_PERFMON_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read) #define
#define VIDEO_GET_STATUS _IOR('o', 27, struct video_status) #define VIDEO_GET_EVENT _IOR('o', 28, struct video_event) #define VIDEO_SET_DISPLAY_FORMAT _IO('o', 29) #define __NR_shmat 30 #define DTV_ISDBT_LAYERC_FEC 31 #define SO_PASSSEC 34 #define DTV_API_VERSION 35 #define SO_TIMESTAMPING_OLD 37 #define I915_PARAM_HAS_POOLED_EU 38 #define KVM_EXIT_MEMORY_FAULT 39 #define KEY_APOSTROPHE 40 #define PORT_UUID_MAX 16 #define NOUVEAU_SVM_BIND_TARGET_BITS 32 #define __NR_clock_adjtime 305 #define __NR_syncfs 267 __SYSCALL(__NR_syncfs, sys_syncfs) #define __NR_setns 346 #define __NR_process_vm_readv (__X32_SYSCALL_BIT + 81) #define __NR_rename 82 #define SO_PASSRIGHTS 83 #define R200_EMIT_PP_TRI_PERF_CNTL 84 #define KVM_CAP_S390_CSS_SUPPORT 85