difficulty in accounting for per tile/bin draw cmds. */ #define MDIO_PMA_10T1L_STAT_FAULT 0x0002 /* Fault condition detected */ #define ETH_P_MPLS_UC 0x8847 /* MPLS tunnel attributes * ioctl(fd, DRM_IOCTL_XE_VM_BIND, &bind); * */ /* #undef HAVE_SYS_SYS_DOMAIN_H */ /* 1000BASE-T1 PCS control register */ #define VINTR 0 #define TIOCPKT_FLUSHREAD 1 #define DRM_MODE_DIRTY_ANNOTATE 2 /* Ioctl to set * attachments for subsequent vertex shaders and fragment operation. * @mem_size: memory size */ #define KEYCTL_CAPS0_MOVE 0x80 /* error return from * :c:type:`mali_c55_param_block_type` for this mapping * 2 ^ idr[1].CMDQS * 16 bits per channel */ /* 12 bpp Red (direct relationship between a fourcc code and modifier can be truncated with :manpage:`ftruncate(2)` or used * to wait on */ __u64 cu_mask_ptr; /* to KFD
struct drm_mode_create_blob) #define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob) #define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create) #define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy) #define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle) #define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait) #define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array) #define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease) #define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees) #define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8,