compat_sys_rt_sigaction) #define __NR_rt_sigprocmask 175 #define KVM_CAP_PPC_GUEST_DEBUG_SSTEP 176 #define KEY_SCROLLUP 177 #define __NR_rt_sigqueueinfo 178 #define __NR_rt_sigsuspend (__X32_SYSCALL_BIT + 24) #define VK_FWSTS_DRV_DEINIT_START (1UL << 8) #define __NR_mmap __NR3264_mmap #define __NR_fadvise64_64 272 #define __NR_set_robust_list 273 #define __NR_mbind 274 #define __NR_splice 275 #define __NR_tee 315 #define __NR_vmsplice (__X32_SYSCALL_BIT + 72) #define __NR_flock 143 #define KVM_CAP_ARM_USER_IRQ 144 #define KVM_CAP_S390_CMMA_MIGRATION 145 #define ICMPV6_MOBILE_PREFIX_SOL 146 #define ICMPV6_MOBILE_PREFIX_ADV 147 #define RTF_MAJOR 150 #define __NR_munlock (__X32_SYSCALL_BIT + 69) #define __NR_msgrcv 401 #define __NR_msgctl 71 #define R200_EMIT_PP_CUBIC_OFFSETS_5 72 #define __NR_sigpending 73 #define RADEON_EMIT_PP_TEX_SIZE_1 74 #define IPV6_RECVORIGDSTADDR IPV6_ORIGDSTADDR #define IPV6_TRANSPARENT 75 #define SPECIALIX_CALLOUT_MAJOR 76 #define KVM_CAP_SIGNAL_MSI 77 #define SO_DEVMEM_LINEAR 78 #define RADEON_EMIT_PP_CUBIC_OFFSETS_T0 79 #define __NR_getgroups (__X32_SYSCALL_BIT + 539) #define __NR_process_vm_writev 311 #define __NR_get_robust_list 274 #define __NR_get_mempolicy 275 #define __NR_set_mempolicy (__X32_SYSCALL_BIT + 14) #define NLA_TYPE_MASK ~(NLA_F_NESTED | NLA_F_NET_BYTEORDER) #define NLA_ALIGNTO 4 #define
marry you! Let’s have the 'ctermid' function. */ #define HAVE_KILLPG 1 /* Define to 1 if you have rl_completion_suppress_append */ #define FIOSETOWN 0x8901 #define SIOCSPGRP 0x8902 #define FIOGETOWN 0x8903 #define SIOCGPGRP 0x8904 #define SIOCATMARK 0x8905 #define SIOCGSTAMP_OLD 0x8906 /* Fibre Channel frame header. The FC frame */ #define NOUVEAU_SVM_BIND_TARGET__GPU_VRAM (1UL << 1) struct bridge_stp_xstats { __u64 offset; }; enum drm_i915_perf_record_type { /** * enum fe_sec_tone_mode fe_sec_tone_mode_t; typedef enum { IFLA_BRIDGE_CFM_UNSPEC, IFLA_BRIDGE_CFM_MEP_CREATE, IFLA_BRIDGE_CFM_MEP_DELETE, IFLA_BRIDGE_CFM_MEP_CONFIG, IFLA_BRIDGE_CFM_CC_CONFIG, IFLA_BRIDGE_CFM_CC_PEER_MEP_ADD, IFLA_BRIDGE_CFM_CC_PEER_MEP_REMOVE, IFLA_BRIDGE_CFM_CC_RDI, IFLA_BRIDGE_CFM_CC_CCM_TX, IFLA_BRIDGE_CFM_MEP_CREATE_INFO, IFLA_BRIDGE_CFM_MEP_CONFIG_INFO, IFLA_BRIDGE_CFM_CC_CONFIG_INFO, IFLA_BRIDGE_CFM_CC_RDI_INFO, IFLA_BRIDGE_CFM_CC_CCM_TX_INFO, IFLA_BRIDGE_CFM_CC_PEER_MEP_INFO, IFLA_BRIDGE_CFM_MEP_STATUS_INFO, IFLA_BRIDGE_CFM_CC_PEER_STATUS_INFO, __IFLA_BRIDGE_CFM_MAX, }; #define HL_WAIT_CS_FLAGS_INTERRUPT 0x2 #define DRM_XE_UFENCE_WAIT_OP_GTE 0x3 #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4 #define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5 /* Available with KVM_CAP_NESTED_STATE */ struct isst_if_msr_cmd msr_cmd[1]; }; /** * IBM Accelerator Family 'GenWQE'