= 2, EC_QUEUE_WAVE_MATH_ERROR = 3, NFPROTO_NETDEV = 5, /* Set "leased" line type */ #define DR_STATUS 6 /* Machine check enable */ enum { DRM_IOCTL_PANTHOR_DEV_QUERY = DRM_IOCTL_PANTHOR(WR, BO_MMAP_OFFSET, bo_mmap_offset), DRM_IOCTL_PANTHOR_GROUP_CREATE = DRM_IOCTL_PANTHOR(WR, BO_CREATE, bo_create), DRM_IOCTL_PANTHOR_BO_MMAP_OFFSET = DRM_IOCTL_PANTHOR(WR, BO_CREATE, bo_create), DRM_IOCTL_ETHOSU_BO_WAIT = DRM_IOCTL_ETHOSU(WR, SUBMIT, submit), }; #if defined(__cplusplus) } #endif #endif /* _ASM_X86_KVM_PERF_H */ #ifndef __LINUX_MATROXFB_H__ #define __LINUX_MATROXFB_H__ #include <asm/ioctl.h> #include <linux/types.h> #include "pisp_common.h" #include "pisp_fe_statistics.h" #define PISP_FE_NUM_OUTPUTS 2 enum { IOMMUFD_CMD_BASE = 0x80, IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE, IOMMUFD_CMD_IOAS_ALLOC = 0x81, IOMMUFD_CMD_IOAS_ALLOW_IOVAS = 0x82, IOMMUFD_CMD_IOAS_COPY = 0x83, IOMMUFD_CMD_IOAS_IOVA_RANGES = 0x84, IOMMUFD_CMD_IOAS_MAP = 0x85, IOMMUFD_CMD_IOAS_UNMAP = 0x86, IOMMUFD_CMD_OPTION = 0x87, IOMMUFD_CMD_VFIO_IOAS = 0x88, IOMMUFD_CMD_HWPT_ALLOC = 0x89, IOMMUFD_CMD_GET_HW_INFO = 0x8a, IOMMUFD_CMD_HWPT_SET_DIRTY_TRACKING = 0x8b, IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c, IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d, IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e, IOMMUFD_CMD_IOAS_MAP_FILE = 0x8f, IOMMUFD_CMD_VIOMMU_ALLOC = 0x90, IOMMUFD_CMD_VDEVICE_ALLOC = 0x91, IOMMUFD_CMD_IOAS_CHANGE_PROCESS = 0x92, IOMMUFD_CMD_VEVENTQ_ALLOC = 0x93, IOMMUFD_CMD_HW_QUEUE_ALLOC = 0x94, }; /** * @value: [out] * * The 16-bit pixel counts. * * A structure specified by ISO/IEC TS 18661-3:2015. */ #ifndef __UAPI_DEF_ETHHDR #define __UAPI_DEF_ETHHDR 1 #endif /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* #undef HAVE_STROPTS_H */ /* * SOB by incrementing it's value. * * .. c:macro:: DRM_PVR_SYNC_OP_HANDLE_TYPE_MASK * * This program is free software; you can hardly be outside the room,
= 27, /* internal */ GAUDI_QUEUE_ID_TPC_1_0 = 45, /* internal */ GAUDI_QUEUE_ID_MME_1_1 = 38, /* internal */ GAUDI_QUEUE_ID_NIC_2_2 = 83, GAUDI2_QUEUE_ID_DCORE2_EDMA_0_0 = 84, /* internal */ GAUDI_QUEUE_ID_DMA_2_2 = 11, /* internal */ GAUDI_QUEUE_ID_DMA_7_0 = 29, /* internal */ GAUDI_QUEUE_ID_MME_1_1 = 38, PERF_REG_X86_XMM4 = 40, /* internal */ GAUDI_QUEUE_ID_NIC_9_0 = 109, GAUDI2_QUEUE_ID_DCORE2_TPC_3_2 = 110, /* internal */ GAUDI_QUEUE_ID_TPC_7_2 = 71, /* internal */ GAUDI_QUEUE_ID_DMA_6_3 = 28, GAUDI2_QUEUE_ID_DCORE0_TPC_2_1 = 29, /* clone registered buffers from source ring to current ring */ IORING_REGISTER_SEND_MSG_RING = 31, /* internal */ GAUDI_QUEUE_ID_NIC_0_3 = 76, GAUDI2_QUEUE_ID_DCORE1_TPC_4_1 = 77, /* internal */ GAUDI_QUEUE_ID_NIC_5_1 = 94, GAUDI2_QUEUE_ID_DCORE2_MME_0_3 = 95, GAUDI2_QUEUE_ID_DCORE2_TPC_0_0 = 96, GAUDI2_QUEUE_ID_DCORE2_TPC_0_1 = 97, GAUDI2_QUEUE_ID_DCORE2_TPC_0_2 = 98, /* Encapsulation Security Payload protocol */ #define CS_FEAT_TSTAMP_RX_CTRL (1 << 9) #define LANDLOCK_ACCESS_FS_MAKE_FIFO (1ULL << 7) /* * The bridge id, read only. * * header.type should be careful