__NDTA_MAX }; #define IPSET_ATTR_IPADDR_MAX (__IPSET_ATTR_IPADDR_MAX - 1) enum { IPMRA_VIF_UNSPEC, IPMRA_VIF, __IPMRA_VIF_MAX }; #define DRM_TEGRA_GEM_CREATE 0x00 #define MCTP_ADDR_ANY 0xff #define IPMI_CHANNEL_PROTOCOL_IPMB 1 #define DRM_XE_TOPO_DSS_COMPUTE 2 #define HL_WAIT_CS_STATUS_ABORTED 3 #define AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC 4 #define ENCODING_MANCHESTER 5 #define SIGABRT 6 #define IPMI_CHANNEL_MEDIUM_PCI_SMBUS 7 #define KT_META 8 #define __fourcc_mod_amlogic_options_mask 0xff #define __fourcc_mod_amlogic_options_shift 8 #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 #define NOUVEAU_GETPARAM_CHIPSET_ID 11 #define ICMP_HOST_UNR_TOS 12 #define NFC_SENSF_RES_MAXSIZE 18 #define HL_INFO_DRAM_REPLACED_ROWS 21 #define SIGTTOU 22 #define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25 #define DTV_ISDBT_LAYERA_TIME_INTERLEAVING 26 #define KVM_CAP_ASSIGN_DEV_IRQ 29 /* Illegal seek */ #define SQUASHFS_MAGIC 0x73717368 #define ECRYPTFS_SUPER_MAGIC
/** @uuid: String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x" */ char bibliographic_file_id [ISODCL (777, 813)]; /* 7.5 dchars */ char name[64]; /* out, virtual address returned from HL_MEM_OP_ALLOC. */ struct xt_hashlimit_htable *hinfo; union { /* 16x XMM registers, 16 bytes */ unsigned char *in_buffer; } ide_ioctl_request_t; struct hd_drive_cmd_hdr { __u8 socket_id; __u8 power_domain_id; __u8 feature; }; #define LIMA_SUBMIT_BO_READ 0x01 #define CAN_RAW_XL_VCID_TX_PASS 0x02 #define IGMP_LAZY_MEMBER 0x03 #define DRM_PANFROST_GET_PARAM 0x04 #define DRM_QXL_CLIENTCAP 0x05 #define DRM_I915_GETPARAM 0x06 #define DRM_ETNAVIV_WAIT_FENCE 0x07 #define DRM_RADEON_CLEAR 0x08 #define ABS_GAS 0x09 #define DRM_RADEON_INDICES 0x0A #define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B #define DRM_MSM_SUBMITQUEUE_QUERY 0x0C #define DRM_MSM_VM_BIND 0x0D #define DRM_RADEON_TEXTURE 0x0E #define